1. Technical Field
The present disclosure relates to a display device, and more particularly, to a gate driving circuit for a display device and a driving method thereof.
2. Discussion of the Related Art
Organic light-emitting diode (OLED) display devices, which are one type of flat display devices (FPDs), have high luminance and a low operating voltage. An OLED display device, which is a self-luminous type, has a high contrast ratio, can be manufactured as an ultrathin display device, has a fast response time of about several microseconds (μs) enabling smooth reproduction of a moving picture, has a wide viewing angle, is stable at low temperature, and is operable at a low voltage of 5V to 15V DC. Thus, it is easy to manufacture and design a driving circuit for the OLED display device.
Furthermore, because deposition and encapsulation processes encompass most of a manufacturing process of an OLED display device, the manufacturing process is very simple. Such an OLED display device is described below with reference to the accompanying drawings.
FIG. 1 illustrates an organic light-emitting diode (OLED) display device according to the related art.
As illustrated in FIG. 1, an OLED display device 10 may include a display panel 20 for displaying an image, a gate driving unit 30 for supplying a gate signal, a data driving unit 40 for supplying a data signal, and a timing control unit 50 for supplying a gate control signal GCS, a data control signal DCS, and image data RGB.
The display panel 20 may include a plurality of gate lines GL1 to GLm, a plurality of data lines DL1 to DLn, and a plurality of power lines PL1 to PLn, which are formed on a substrate (not shown). The gate lines GL1 to GLm, the data lines DL1 to DLn, and the power lines PL1 to PLn cross one another, forming a pixel area P. Each pixel area P is provided with a switching thin film transistor (TFT) Ts connected to the gate lines GL1 to GLm and the data lines DL1 to DLn, a driving TFT Td and a storage capacitor Cs connected to a switching TFT Ts, and a light-emitting diode De connected to the driving TFT Td.
The gate driving unit 30 generates a gate signal by using the gate control signal GCS transmitted by the timing control unit 50, and transmits a generated gate signal to the gate lines GL1 to GLm of the display panel 20. The data driving unit 40 generates a data signal by using the data control signal DCS and the image data RGB transmitted by the timing control unit 50, and transmits a generated data signal to the data lines DL1 to DLn of the display panel 20. A power supply unit (not shown) supplies a power voltage to the power lines PL1 to PLn via the data driving unit 40.
The timing control unit 50 generates the gate control signal GCS, the data control signal DCS, and the image data RGB by using an image signal IS, a data enable signal DE, a horizontal sync signal HSY, a vertical sync signal VSY, and a clock signal CLK, which are input from an external system.
In the OLED display device 10 configured as above, when the switching TFT Ts is turned on in response to the gate signal applied via the gate lines GL1 to GLm, the data signal applied via the data lines DL1 to DLn is applied to the driving TFT Td via the switching TFT Ts. Thus, the driving TFT Td is turned on. A current applied via the power lines PL1 to PLn is applied to the light-emitting diode De via the driving TFT Td, thereby enabling display of a grayscale level.
The display panel 20 may further include a plurality of compensation elements (not shown) to compensate for a change in a threshold voltage Vth of the driving TFT Td. The gate driving unit 30 may include a shift register for generating a gate signal to sequentially turn the switching TFTs Ts on and an inverter for generating an emission signal to control the compensation elements. However, in the shift register and the inverter, many TFTs are under high junction stress. That is, TFTs are kept turned off because a high voltage is applied between a drain and a source in most of one (1) frame that is a unit of image display. A TFT under high junction stress may have a malfunction, such as drain-induced barrier lowering (DIBL), which is described below with reference to the accompany drawings
FIG. 2 illustrates that a drain-source voltage is not applied to a TFT of a gate driving unit of the OLED display device of FIG. 1. FIG. 3 illustrates that the drain-source voltage is applied to the TFT of the gate driving unit of the OLED display device of FIG. 1. FIG. 4 is a graph showing the electrical properties of the TFT of the gate driving unit of the OLED display device of FIG. 1.
With reference to FIG. 2, in a TFT including a gate G, a drain D, and a source S, when the drain-source voltage Vds is not applied between the drain D and the source S, a depletion region DR is formed by the gate G, the drain D, and the source S, and electrons of the source S are not transferred to the drain D so that no current flows in the TFT.
With reference to FIG. 3, when the drain-source voltage Vds, which is a relatively high voltage, is applied between the source S and the drain D, the depletion region DR by the drain D extends in a direction toward the source S. Thus, the height of a potential barrier of elements is lowered. Accordingly, some electrons of the source S are transferred to the drain D. Thus, a current flows in the TFT.
The above phenomenon is referred to as the drain-induced barrier lowering. The drain-induced barrier lowering becomes severe as a length L of a channel of the TFT deceases and the voltage of the drain D increases.
The drain-induced barrier lowering may be represented by a change in the threshold voltage Vth of the TFT. For example, in a positive type (p-type) TFT, as the drain-source voltage Vds increases, the threshold voltage Vth moves in a positive direction of a gate-source voltage Vgs, thereby increasing an off-current.
In other words, with reference to FIG. 4, as the drain-source voltage Vds increases from about −0.1V to about −10.1V and about −20.1V, the threshold voltage Vth moves in the positive direction of the gate-source voltage Vgs. As a result, when the gate-source voltage Vgs is about 0V, the drain-source current Ids of the TFT is changed from about 10 fA (1×10−14 A) to about 1 pA (1×10−12 A) and about 10 nA (1×10−8 A) and thus the off-current at which the TFT is turned off increases. The increase in the off-current of the TFT causes a malfunction of the gate driving unit 30. Such a problem may be more severe in a gate-in-panel (GIP) type flexible OLED display device that has been recently introduced.
In the gate-in-panel type OLED display device, a plurality of TFTs constituting a gate driving unit are manufactured by the same process of manufacturing the switching TFT Ts and the driving TFT Td of the display panel 20. Thus, the gate driving unit is formed on a substrate of a display panel. A flexible substrate is used in a flexible OLED display device for a thin and light display device. For example, the flexible substrate is formed of a polymer material, such as polyimide (PI).
Accordingly, in the gate-in-panel type flexible OLED display device, the TFT constituting the gate driving unit is formed on the flexible substrate. Because the thermal diffusivity of polyimide (about 0.08 mm2/s) is much lower than the thermal diffusivity of glass (0.34 mm2/s), the heat sinking properties of the flexible substrate is much lower than those of a glass substrate. Accordingly, in the TFT on the flexible substrate, joule heat according to repeated operations of turning-on/turning-off is not dissipated, and the drain-induced barrier lowering is more severe.
The malfunction of the TFT of the shift register of the gate driving unit increases a diode current flowing in a light-emitting diode by turning on a plurality of switching TFTs by outputting a plurality of gate signals, or by turning on a plurality of sampling transistors by outputting a plurality of sampling signals. As a result, a defect occurs, such as a whitening phenomenon, i.e., luminance of a part of the display panel 20 increases.
The malfunction of the TFT of the inverter of the gate driving unit increases a voltage level of the emission signal so that an amount of the turn-on of a light-emitting transistor is reduced. Accordingly, the diode current flowing in the light-emitting diode is reduced. Thus, a defect occurs, such as an irregular horizontal line pattern, i.e., horizontal pixel lines of the display panel 20 are irregularly darkened.
FIG. 5 is a graph showing the electrical properties of an emission Q node of an inverter unit of the OLED display device of FIG. 1.
With reference to FIG. 5, as a current leakage occurred in the TFT in a high temperature reliability environment, a voltage of the emission Q node of the inverter unit gradually drops to 12V as time passes. The voltage drop of the emission Q node may be generated, not only in the high temperature reliability environment, but also by degradation of the TFT. The Q node denotes a gate node of the driving TFT.
FIG. 6 is a graph showing the electrical properties of an output voltage of the inverter unit of the OLED display device of FIG. 1.
With reference to FIG. 6, as the voltage of the emission Q node of the inverter unit drops to 12V, the emission output voltage of the inverter unit reaches 12V. Accordingly, because an amount of the turn-on of a light-emitting transistor is reduced according to a decrease in the emission output voltage, the diode current flowing in the light-emitting diode decreases. Thus, a defect occurs, such as an irregular horizontal line pattern, i.e., horizontal pixel lines of the display panel 20 are irregularly darkened.